EK-V6-ML631-G-J【PDF 19/65 页】VIRTEX-6 HXT FPGA ML631 EVAL KIT

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Virtex-6 FPGA Data Sheet: DC and Switching Characteristics

GTH Transceiver DC Input and Output Levels

Table 30 summarizes the DC output specifications of the GTH transceivers in Virtex-6 FPGAs. Consult UG371 : Virtex-6

FPGA GTH Transceivers User Guide for further details.

Table 30: GTH Transceiver DC Specifications

Symbol

DC Parameter

Conditions

Min

Typ

Max

Units

D VPPIN

Differential peak-to-peak input voltage External AC coupled

175

–

1200

mV

D VPPOUT

Differential peak-to-peak output

voltage (1)

Transmitter output swing is set to

maximum setting

800

–

1200

mV

R IN

R OUT

T OSKEW

C EXT

Differential input resistance

Differential output resistance

Transmitter output pair (TXP and TXN) intra-pair skew

Recommended external AC coupling capacitor (2)

80

80

–

–

100

100

2

100

120

120

–

–

Ω

Ω

ps

nF

Notes:

1.

2.

The output swing and preemphasis levels are programmable using the attributes discussed in UG371 : Virtex-6 FPGA GTH Transceivers User

Guide and can result in values lower than reported in this table.

Other values can be used as appropriate to conform to specific protocols and standards.

Table 31 summarizes the DC specifications of the clock input of the GTH transceiver. Consult UG371 : Virtex-6 FPGA GTH

Transceivers User Guide for further details.

Table 31: GTH Transceiver Clock DC Input Level Specification

Symbol

V IDIFF

R IN

C EXT

DC Parameter

Differential peak-to-peak input voltage

Differential input resistance

Required external AC coupling capacitor

Conditions

≤ 600 MHz

> 600 MHz

Min

500

600

80

–

Typ

–

–

100

100

Max

1600

1600

120

–

Units

mV

mV

Ω

nF

DS152 (v3.6) March 18, 2014

Product Specification

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